Show understanding of the need for input, output, primary memory and secondary (including removable) storage
9608_w21_qp_11_sc_4.a
9608_w21_qp_11_sc_4.a Question Image Answer
9608_w21_qp_11_sc_4.a Mark Scheme Image
9608_s20_qp_11_sc_2.a
9608_s20_qp_11_sc_2.a Question Image Answer
9608_s20_qp_11_sc_2.a Mark Scheme Image
9608_w19_qp_13_sc_1.a.i
9608_w19_qp_13_sc_1.a.i Question Image Answer
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9608_w19_qp_13_sc_1.a.ii
9608_w19_qp_13_sc_1.a.ii Question Image Answer
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9608_w19_qp_13_sc_1.b.i
9608_w19_qp_13_sc_1.b.i Question Image Answer
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9608_w19_qp_12_sc_6.a.i
9608_w19_qp_12_sc_6.a.i Question Image Answer
9608_w19_qp_12_sc_6.a.i Mark Scheme Image
9608_w19_qp_12_sc_6.b.i
9608_w19_qp_12_sc_6.b.i Question Image Answer
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9608_w19_qp_11_sc_2.a.i
9608_w19_qp_11_sc_2.a.i Question Image Answer
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9608_w19_qp_11_sc_2.a.ii
9608_w19_qp_11_sc_2.a.ii Question Image Answer
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9608_w19_qp_11_sc_2.a.iii
9608_w19_qp_11_sc_2.a.iii Question Image Answer
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9608_s18_qp_13_sc_7.b.i
9608_s18_qp_13_sc_7.b.i Question Image Answer
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9608_s18_qp_13_sc_7.b.ii
9608_s18_qp_13_sc_7.b.ii Question Image Answer
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9608_s18_qp_13_sc_7.c
9608_s18_qp_13_sc_7.c Question Image Answer
9608_s18_qp_13_sc_7.c Mark Scheme Image
9608_s18_qp_11_sc_7.a
9608_s18_qp_11_sc_7.a Question Image Answer
9608_s18_qp_11_sc_7.a Mark Scheme Image
9608_w17_qp_13_sc_5.b.i
9608_w17_qp_13_sc_5.b.i Question Image Answer
9608_w17_qp_13_sc_5.b.i Mark Scheme Image
9608_w17_qp_13_sc_5.b.ii
9608_w17_qp_13_sc_5.b.ii Question Image Answer
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9608_w17_qp_12_sc_6.a
9608_w17_qp_12_sc_6.a Question Image Answer
9608_w17_qp_12_sc_6.a Mark Scheme Image
9608_s17_qp_13_sc_2.a.ii
9608_s17_qp_13_sc_2.a.ii Question Image Answer
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9608_s17_qp_13_sc_2.b
9608_s17_qp_13_sc_2.b Question Image Answer
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9608_s17_qp_12_sc_2.c.i
9608_s17_qp_12_sc_2.c.i Question Image Answer
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9608_s17_qp_12_sc_2.c.ii
9608_s17_qp_12_sc_2.c.ii Question Image Answer
9608_s17_qp_12_sc_2.c.ii Mark Scheme Image
9608_s17_qp_11_sc_2.a.ii
9608_s17_qp_11_sc_2.a.ii Question Image Answer
9608_s17_qp_11_sc_2.a.ii Mark Scheme Image
9608_s17_qp_11_sc_2.b
9608_s17_qp_11_sc_2.b Question Image Answer
9608_s17_qp_11_sc_2.b Mark Scheme Image
9608_w15_qp_13_sc_5.ii
9608_w15_qp_13_sc_5.ii Question Image Answer
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9608_w15_qp_13_sc_5.iii
9608_w15_qp_13_sc_5.iii Question Image Answer
9608_w15_qp_13_sc_5.iii Mark Scheme Image
9608_w15_qp_11_sc_5.iii
9608_w15_qp_11_sc_5.iii Question Image Answer
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9608_s15_qp_12_sc_4.a.iii
9608_s15_qp_12_sc_4.a.iii Question Image Answer
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9608_s15_qp_12_sc_6.a
9608_s15_qp_12_sc_6.a Question Image Answer
9608_s15_qp_12_sc_6.a Mark Scheme Image
9608_s15_qp_11_sc_6.a
9608_s15_qp_11_sc_6.a Question Image Answer
9608_s15_qp_11_sc_6.a Mark Scheme Image
Show understanding of embedded systems
Describe the principal operations of hardware devices
9608_w21_qp_11_sc_4.a
9608_w21_qp_11_sc_4.a Question Image Answer
9608_w21_qp_11_sc_4.a Mark Scheme Image
9608_w21_qp_11_sc_4.b
9608_w21_qp_11_sc_4.b Question Image Answer
9608_w21_qp_11_sc_4.b Mark Scheme Image
9608_s20_qp_13_sc_2.a
9608_s20_qp_13_sc_2.a Question Image Answer
9608_s20_qp_13_sc_2.a Mark Scheme Image
9608_s20_qp_12_sc_1.a
9608_s20_qp_12_sc_1.a Question Image Answer
9608_s20_qp_12_sc_1.a Mark Scheme Image
9608_s20_qp_11_sc_2.b.i
9608_s20_qp_11_sc_2.b.i Question Image Answer
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9608_w19_qp_13_sc_1.a.iii
9608_w19_qp_13_sc_1.a.iii Question Image Answer
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9608_w19_qp_12_sc_6.a.i
9608_w19_qp_12_sc_6.a.i Question Image Answer
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9608_w19_qp_12_sc_6.a.ii
9608_w19_qp_12_sc_6.a.ii Question Image Answer
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9608_w19_qp_12_sc_6.b.ii
9608_w19_qp_12_sc_6.b.ii Question Image Answer
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9608_w19_qp_11_sc_2.a.iv
9608_w19_qp_11_sc_2.a.iv Question Image Answer
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9608_s19_qp_12_sc_4.a.i
9608_s19_qp_12_sc_4.a.i Question Image Answer
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9608_s19_qp_12_sc_4.a.ii
9608_s19_qp_12_sc_4.a.ii Question Image Answer
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9608_w18_qp_11_sc_1.a
9608_w18_qp_11_sc_1.a Question Image Answer
9608_w18_qp_11_sc_1.a Mark Scheme Image
9608_s18_qp_13_sc_7.a
9608_s18_qp_13_sc_7.a Question Image Answer
9608_s18_qp_13_sc_7.a Mark Scheme Image
9608_s18_qp_13_sc_7.c
9608_s18_qp_13_sc_7.c Question Image Answer
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9608_w17_qp_13_sc_5.a.i
9608_w17_qp_13_sc_5.a.i Question Image Answer
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9608_w17_qp_13_sc_5.a.ii
9608_w17_qp_13_sc_5.a.ii Question Image Answer
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9608_w17_qp_12_sc_6.a
9608_w17_qp_12_sc_6.a Question Image Answer
9608_w17_qp_12_sc_6.a Mark Scheme Image
9608_w17_qp_12_sc_6.b
9608_w17_qp_12_sc_6.b Question Image Answer
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9608_s17_qp_13_sc_2.a.i
9608_s17_qp_13_sc_2.a.i Question Image Answer
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9608_s17_qp_13_sc_2.a.ii Question Image Answer
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9608_s17_qp_13_sc_2.b
9608_s17_qp_13_sc_2.b Question Image Answer
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9608_s17_qp_12_sc_2.a
9608_s17_qp_12_sc_2.a Question Image Answer
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9608_s17_qp_12_sc_2.b.i
9608_s17_qp_12_sc_2.b.i Question Image Answer
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9608_s17_qp_12_sc_2.c.i
9608_s17_qp_12_sc_2.c.i Question Image Answer
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9608_s17_qp_12_sc_2.c.ii
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9608_s17_qp_11_sc_2.a.i
9608_s17_qp_11_sc_2.a.i Question Image Answer
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9608_s17_qp_11_sc_2.b
9608_s17_qp_11_sc_2.b Question Image Answer
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9608_w16_qp_13_sc_4.i
9608_w16_qp_13_sc_4.i Question Image Answer
9608_w16_qp_13_sc_4.i Mark Scheme Image
9608_w16_qp_13_sc_4.ii
9608_w16_qp_13_sc_4.ii Question Image Answer
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9608_w16_qp_13_sc_4.iii
9608_w16_qp_13_sc_4.iii Question Image Answer
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9608_w16_qp_13_sc_4.iv
9608_w16_qp_13_sc_4.iv Question Image Answer
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9608_w16_qp_12_sc_3
9608_w16_qp_12_sc_3 Question Image Answer
9608_w16_qp_12_sc_3 Mark Scheme Image
9608_w16_qp_11_sc_4.i
9608_w16_qp_11_sc_4.i Question Image Answer
9608_w16_qp_11_sc_4.i Mark Scheme Image
9608_w16_qp_11_sc_4.ii
9608_w16_qp_11_sc_4.ii Question Image Answer
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9608_w16_qp_11_sc_4.iii
9608_w16_qp_11_sc_4.iii Question Image Answer
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9608_w16_qp_11_sc_4.iv
9608_w16_qp_11_sc_4.iv Question Image Answer
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9608_s15_qp_13_sc_4.c
9608_s15_qp_13_sc_4.c Question Image Answer
9608_s15_qp_13_sc_4.c Mark Scheme Image
9608_s15_qp_12_sc_6.a
9608_s15_qp_12_sc_6.a Question Image Answer
9608_s15_qp_12_sc_6.a Mark Scheme Image
9608_s15_qp_11_sc_6.a
9608_s15_qp_11_sc_6.a Question Image Answer
9608_s15_qp_11_sc_6.a Mark Scheme Image
Show understanding of the use of buffers
9608_w16_qp_13_sc_6
9608_w16_qp_13_sc_6 Question Image Answer
9608_w16_qp_13_sc_6 Mark Scheme Image
9608_w16_qp_12_sc_3
9608_w16_qp_12_sc_3 Question Image Answer
9608_w16_qp_12_sc_3 Mark Scheme Image
9608_w16_qp_11_sc_6
9608_w16_qp_11_sc_6 Question Image Answer
9608_w16_qp_11_sc_6 Mark Scheme Image
Explain the differences between Random Access Memory (RAM) and Read Only Memory (ROM)
9608_s20_qp_13_sc_2.b
9608_s20_qp_13_sc_2.b Question Image Answer
9608_s20_qp_13_sc_2.b Mark Scheme Image
9608_s20_qp_11_sc_2.b.ii
9608_s20_qp_11_sc_2.b.ii Question Image Answer
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9608_w19_qp_12_sc_6.c
9608_w19_qp_12_sc_6.c Question Image Answer
9608_w19_qp_12_sc_6.c Mark Scheme Image
9608_s18_qp_13_sc_7.d
9608_s18_qp_13_sc_7.d Question Image Answer
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9608_s18_qp_11_sc_7.b.i
9608_s18_qp_11_sc_7.b.i Question Image Answer
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9608_s18_qp_11_sc_7.b.ii
9608_s18_qp_11_sc_7.b.ii Question Image Answer
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9608_s18_qp_11_sc_7.b.iii
9608_s18_qp_11_sc_7.b.iii Question Image Answer
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9608_w16_qp_12_sc_6.a
9608_w16_qp_12_sc_6.a Question Image Answer
9608_w16_qp_12_sc_6.a Mark Scheme Image
9608_s15_qp_13_sc_4.b
9608_s15_qp_13_sc_4.b Question Image Answer
9608_s15_qp_13_sc_4.b Mark Scheme Image
Explain the differences between Static RAM (SRAM) and Dynamic RAM (DRAM)
9608_w21_qp_11_sc_4.c
9608_w21_qp_11_sc_4.c Question Image Answer
9608_w21_qp_11_sc_4.c Mark Scheme Image
9608_w19_qp_13_sc_1.b.ii
9608_w19_qp_13_sc_1.b.ii Question Image Answer
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9608_s19_qp_12_sc_4.c
9608_s19_qp_12_sc_4.c Question Image Answer
9608_s19_qp_12_sc_4.c Mark Scheme Image
9608_w18_qp_13_sc_6.c
9608_w18_qp_13_sc_6.c Question Image Answer
9608_w18_qp_13_sc_6.c Mark Scheme Image
9608_w16_qp_13_sc_2.a
9608_w16_qp_13_sc_2.a Question Image Answer
9608_w16_qp_13_sc_2.a Mark Scheme Image
9608_w16_qp_12_sc_6.b
9608_w16_qp_12_sc_6.b Question Image Answer
9608_w16_qp_12_sc_6.b Mark Scheme Image
9608_w16_qp_11_sc_2.a
9608_w16_qp_11_sc_2.a Question Image Answer
9608_w16_qp_11_sc_2.a Mark Scheme Image
9608_s15_qp_13_sc_4.a
9608_s15_qp_13_sc_4.a Question Image Answer
9608_s15_qp_13_sc_4.a Mark Scheme Image
Explain the difference between Programmable ROM (PROM), Erasable Programmable ROM (EPROM) and Electrically Erasable Programmable ROM (EEPROM)
Show an understanding of monitoring and control systems
9608_w15_qp_13_sc_5.i
9608_w15_qp_13_sc_5.i Question Image Answer
9608_w15_qp_13_sc_5.i Mark Scheme Image
9608_w15_qp_13_sc_5.ii
9608_w15_qp_13_sc_5.ii Question Image Answer
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9608_w15_qp_13_sc_5.iii
9608_w15_qp_13_sc_5.iii Question Image Answer
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9608_w15_qp_11_sc_5.i
9608_w15_qp_11_sc_5.i Question Image Answer
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9608_w15_qp_11_sc_5.ii
9608_w15_qp_11_sc_5.ii Question Image Answer
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9608_w15_qp_11_sc_5.iii
9608_w15_qp_11_sc_5.iii Question Image Answer
9608_w15_qp_11_sc_5.iii Mark Scheme Image
9608_s15_qp_12_sc_4.a.i
9608_s15_qp_12_sc_4.a.i Question Image Answer
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9608_s15_qp_12_sc_4.a.ii
9608_s15_qp_12_sc_4.a.ii Question Image Answer
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9608_s15_qp_12_sc_4.a.iii
9608_s15_qp_12_sc_4.a.iii Question Image Answer
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9608_s15_qp_11_sc_4.a.i
9608_s15_qp_11_sc_4.a.i Question Image Answer
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9608_s15_qp_11_sc_4.a.ii
9608_s15_qp_11_sc_4.a.ii Question Image Answer
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9608_s15_qp_11_sc_4.a.iii
9608_s15_qp_11_sc_4.a.iii Question Image Answer
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